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| PD - 95064A P-Channel Surface Mount (IRFR9310) l Straight Lead (IRFU9310) l Advanced Process Technology l Fast Switching l Fully Avalanche Rated l Lead-Free Description l l IRFR9310PbF IRFU9310PBF D HEXFET(R) Power MOSFET VDSS = -400V RDS(on) = 7.0 S G ID = -1.8A Third Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-Pak TO-252AA I-Pak TO-251AA Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C V GS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. -1.8 -1.1 -7.2 50 0.40 20 92 -1.8 5.0 -24 -55 to + 150 300 (1.6mm from case ) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount)** Junction-to-Ambient Typ. Max. 2.5 50 110 Units C/W www.irf.com 1 1/10/05 IRFR/U9310PbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -400 -2.0 0.91 Typ. -0.41 11 10 25 24 Max. Units Conditions V VGS = 0V, ID = -250A V/C Reference to 25C, ID = -1mA 7.0 VGS = -10V, ID = -1.1A -4.0 V VDS = VGS, ID = -250A S VDS = -50V, ID = -1.1A -100 VDS = -400V, VGS = 0V A -500 VDS = -320V, VGS = 0V, TJ = 125C 100 VGS = 20V nA -100 VGS = -20V 13 ID = -1.1A 3.2 nC VDS = -320V 5.0 VGS = -10V, See Fig. 6 and 13 VDD = -200V ID = -1.1A ns RG = 21 RD = 180, See Fig. 10 D Between lead, 4.5 6mm (0.25in.) nH G from package 7.5 and center of die contact S 270 VGS = 0V 50 pF VDS = -25V 8.0 = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Notes: Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol -1.9 showing the A G integral reverse -7.6 p-n junction diode. S -4.0 V TJ = 25C, IS = -1.1A, V GS = 0V 170 260 ns TJ = 25C, IF = -1.1A 640 960 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 57mH RG = 25, IAS = -1.8 A. (See Figure 12) ISD -1.1A, di/dt 450A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%. This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 2 www.irf.com IRFR/U9310PbF 10 -I D , Drain-to-Source Current (A) -I D , Drain-to-Source Current (A) VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP 10 VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP 1 1 -4.5V -4.5V 0.1 1 10 20s PULSE WIDTH TJ = 25 C 100 0.1 20s PULSE WIDTH TJ = 150 C 1 10 100 -VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) 10 2.5 ID = -1.8A -I D , Drain-to-Source Current (A) TJ = 25 C TJ = 150 C 1 2.0 1.5 1.0 0.5 0.1 4 5 6 7 V DS = -50V 20s PULSE WIDTH 8 9 10 0.0 -60 -40 -20 VGS = -10V 0 20 40 60 80 100 120 140 160 -VGS, Gate-to-Source Voltage (V) TJ , Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3 IRFR/U9310PbF 500 -VGS , Gate-to-Source Voltage (V) 400 VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd 20 ID = -1.1A VDS =-320V VDS =-200V VDS =-80V 16 C, Capacitance (pF) 300 Ciss 12 200 8 Coss 100 4 Crss 0 1 10 100 0 0 4 8 FOR TEST CIRCUIT SEE FIGURE 13 12 16 -VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 10 100 -ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) -ID , Drain Current (A) I 10 10us TJ = 150 C 1 100us 1 1ms TJ = 25 C 0.1 1.0 V GS = 0 V 2.0 3.0 4.0 5.0 0.1 TC = 25 C TJ = 150 C Single Pulse 10 100 10ms 1000 -VSD ,Source-to-Drain Voltage (V) -VDS , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com IRFR/U9310PbF 2.0 VDS VGS RD 1.6 -ID , Drain Current (A) 1.2 -10V Pulse Width 1 s Duty Factor 0.1 % 0.8 Fig 10a. Switching Time Test Circuit td(on) tr t d(off) tf 0.4 VGS 10% 0.0 25 50 75 100 125 150 TC , Case Temperature ( C) 90% VDS Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms 10 Thermal Response (Z thJC ) D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 0.01 0.00001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com + - RG D.U.T. VDD 5 IRFR/U9310PbF VDS L EAS , Single Pulse Avalanche Energy (mJ) 300 RG D.U.T IAS VDD A DRIVER 250 ID -0.49A -0.7A BOTTOM -1.1A TOP -20V tp 0.01 200 150 15V 100 Fig 12a. Unclamped Inductive Test Circuit I AS 50 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) tp V(BR)DSS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F VG VGS -3mA Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com + QGS QGD D.U.T. - -10V VDS IRFR/U9310PbF Peak Diode Recovery dv/dt Test Circuit D.U.T* + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test + VDD * Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [VDD] Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS www.irf.com 7 IRFR/U9310PbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR120 WITH ASS EMBLY LOT CODE 1234 ASS EMBLED ON WW 16, 1999 IN THE ASS EMBLY LINE "A" Note: "P" in a ssembly line position indicates "Lea d-Free" PART NUMBER INTERNATIONAL RECTIFIER LOGO IRFU120 12 916A 34 AS SEMBLY LOT CODE DATE CODE YEAR 9 = 1999 WEEK 16 LINE A OR PART NUMBER INTERNATIONAL RECTIFIER LOGO IRFU120 12 34 DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = AS SEMBLY SITE CODE AS SEMBLY LOT CODE 8 www.irf.com IRFR/U9310PbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information EXAMPLE: T HIS IS AN IRFU120 WIT H ASSEMBLY LOT CODE 5678 ASSE MBLE D ON WW 19, 1999 IN T HE ASSEMBLY LINE "A" Note: "P" in ass embly line pos ition indicates "Lead-Free" PART NUMBER INTE RNAT IONAL RECT IF IER LOGO IRFU120 919A 56 78 ASSEMBLY LOT CODE DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A OR PART NUMBE R INT ERNAT IONAL RECTIF IER LOGO IRFU120 56 78 AS SEMBLY LOT CODE DATE CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPTIONAL) YEAR 9 = 1999 WE EK 19 A = ASS EMBLY SIT E CODE www.irf.com 9 IRFR/U9310PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 ( .641 ) 15.7 ( .619 ) 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/05 10 www.irf.com |
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